With recent central processing units (CPUs), a plurality of CPUs (or CPU cores or processors) are used to perform parallel processing on large-scale data such as multimedia data in order to improve processing performance. It is not preferable to increase the operating frequency of a conventional CPU or memory because the increase in the operating frequency thereof leads to an increase in power consumption and, by extension, an increase in the heat generation amount of a chip.
As a method for further improving performance, it is proposed to cause a field programmable gate array (FPGA) circuit or a programmable logic device (PLD), which is a type of reconfigurable circuits capable of reconfiguring a hardware circuit, to execute processing of part of a process currently being executed. The FPGA circuit configures an operation circuit suitable for processing in question, based on circuit definition data (or configuration data). In addition, since the FPGA circuit has a plurality of operation circuits, it is also possible to configure a plurality of the operation circuits using the configuration data and perform parallel operation processing. Further, it is predicted that, in the future, the central processing unit will include the FPGA circuit in addition to a plurality of processors (or CPUs or CPU cores), and the processors will cause the FPGA circuit to execute processing of part of the process currently being executed by CPU core.
Japanese Laid-open Patent Publication No. 2006-260377 indicates that, although the reconfigurable circuit is not used here, a plurality of processors request peripheral hardware to execute a task. And, Japanese Laid-open Patent Publication No. 2006-119802 and Japanese Laid-open Patent Publication No. 2007-148746 disclose a related art.